3D Integrated Laser Attach Technology on a 300-mm Monolithic CMOS Silicon Photonics Platform

Abstract

Enabling cost-effective and power-efficient laser source on a silicon photonics (SiPh) platform is a major goal that has been highly sought after. In the past two decades, tremendous effort has been made to develop various on-chip integration techniques to enhance SiPh circuits with efficient light-emitting materials. Here we review our recent advancements in hybrid flip-chip integration of III-V lasers on a 300-mm monolithic SiPh platform. By leveraging advanced complementary metal oxide semiconductor (CMOS) manufacturing processes, we have demonstrated wafer-scale laser attach based on a precisely controlled cavity formed on a silicon-on-insulator (SOI) substrate. The laser integration process is aided by precise mechanical alignment features on the SiPh wafer and high-precision fiducials on the laser. Efficient laser-to-SiPh-circuit butt-coupling with optical power up to 20 mW was demonstrated through wafer- and module-level characterizations. Key performance metrics including side-mode suppression ratio, mode-hopping, and relative intensity noise were characterized after laser integration. In addition, early reliability assessments were performed on laser-attached SOI wafers and Si submount assemblies to understand the long-term performance stability of the lasers on the monolithic platform. To further enhance the performance of the laser-integrated chip, we explored alternative spot-size converters that could simultaneously enable improved coupling efficiency and relaxed fabrication tolerance, thus showing great promise over traditional designs.