Wideband wafer-scale interconnections in a wafer scale hybrid package for a 1000 MIPS highly pipelined GaAs/AlGaAs HBT RISC

Abstract

A wideband thin-film wafer scale hybrid package (WSHP) or multi-chip module (MCM) will be used to interconnect the chips of a high-performance RISC (reduced instruction set computer) architecture developed at Rensselaer. This architecture is being implemented using GaAs/AlGaAs heterojunction bipolar transistors (HBTs) and triple-level differential current-mode logic. Because of high power consumption yield limitations of the HBT technology, the processor is partitioned into multiple chips. These chips must be connected using lines capable of handling the fast rise-time signals. Also, the MCM must contain integrated bypass capacitors and termination resistors.< >