An adaptive path delay fault diagnosis methodology [logic IC testing]
Abstract
A framework to adaptively perform delay fault diagnosis is introduced. We propose a methodology to perform diagnosis taking into account the effect of test vectors on the propagation delay along a path. An ATPG capable of generating test vectors that cannot be invalidated due to process variations in the submicron technology is used for diagnosis purposes. The proposed framework also has the ability to generate tests that can take care of delay faults induced by noise. Experimental results on the ISCAS'85 benchmarks shows the effectiveness of the proposed technique.
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