ABSTRACT Semiconductor packaging IP design house RFMOD Ltd. (Cambridge UK), is proud to debut its WLPoP™ technology at IWLPC 2011. A new, potentially disruptive, Wafer-Level Chip-Scale packaging technology (US and Taiwan Patent Pending) is presented which introduces the stacking/ nesting of multiple heterogeneous WLCSP devices chips without the use of expensive substrates [no embedding], fan-out wafers, silicon interposers or Thru-Silicon-Vias (TSV). The technology construction, application and benefits, are presented together with methods for mitigation and optimization of assembly yield, through the use of pre-tested “known-good” WLCSPs from multiple wafers. A brief explanation of its application to high volume target markets and the company's plans to introduce the technology is given.
Tom StrothmannSeung Wook YoonYaojian Lin
Philipp SchmidbauerMaciej WojnowskiK. PresselRobert WeigelAmelie Hagelauer
Guilian GaoKenneth A. HonerCharles Rosenstein
Ser Choong ChongDavid Ho Soon WeeVempati Srinivasa RaoNagendra Sekhar Vasarla