8T SRAM CIM Based on Interleaved Adder Tree Structure

Tao Jiang; Yi Lü; Weijun Gao; Lijun Zhang

doi:10.1109/eicct65471.2025.11100073

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JOURNAL ARTICLE

8T SRAM CIM Based on Interleaved Adder Tree Structure

Tao Jiang Yi Lü Weijun Gao Lijun Zhang

Year: 2025 Pages: 88-93

DOI: 10.1109/eicct65471.2025.11100073

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Keywords:

Adder Static random-access memory Computer science Parallel computing Random access memory Tree (set theory) Computer architecture Computer hardware Mathematics Telecommunications Latency (audio)

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VLSI and Analog Circuit Testing

Physical Sciences → Computer Science → Hardware and Architecture

Network Packet Processing and Optimization

Physical Sciences → Computer Science → Hardware and Architecture

VLSI and FPGA Design Techniques

Physical Sciences → Engineering → Electrical and Electronic Engineering

8T SRAM CIM Based on Interleaved Adder Tree Structure

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