Variable spanning tree adder

Abstract

This paper presents the design of the constant and variable spanning tree adders, 64 bit adders based on the spanning tree adder and the recursive hybrid adder. Manchester carry chains of various lengths are used to optimize the designs. The intermediate outputs of the carry chain used in the spanning tree adder are eliminated. A comparison of the delay and complexity of the spanning tree adder, the recursive hybrid adder and the two new adders shows that the delays are less for the new adders while the complexities are between that of the spanning tree adder and the recursive hybrid adder.