Research on dual stage pipeline MCU based on RISC-V on FPGA

Yujie Li; Zuo Qiao; Wei Liang; Lingjie Li; Haokang Zhang; Xiaodong Zhang; Chong Shen

doi:10.1117/12.3034759

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JOURNAL ARTICLE

Research on dual stage pipeline MCU based on RISC-V on FPGA

Yujie Li Zuo Qiao Wei Liang Lingjie Li Haokang Zhang Xiaodong Zhang Chong Shen

Year: 2024 Pages: 15-15

DOI: 10.1117/12.3034759

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Keywords:

Microcontroller Pipeline (software) Reduced instruction set computing Field-programmable gate array Dual (grammatical number) Computer science Embedded system Stage (stratigraphy) Computer hardware Parallel computing Operating system Instruction set Geology

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Topics

Embedded Systems and FPGA Design

Physical Sciences → Engineering → Control and Systems Engineering

Advanced Algorithms and Applications

Physical Sciences → Engineering → Control and Systems Engineering

Embedded Systems and FPGA Applications

Physical Sciences → Engineering → Electrical and Electronic Engineering

Research on dual stage pipeline MCU based on RISC-V on FPGA

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Citation History

Topics

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