Abstract

One challenge imposed by ubiquitous computing of embedded systems is the need for power and energy-efficient implementations, particularly because many of them are operated with batteries. In this sense, tailored application-specific processors can meet the resource requirements of a specific application in the most efficient way. In this paper, we present TailoredCore, a design methodology to generate application-specific processors based on a core architecture implementation. This methodology analyzes the application to be executed and produces a customized RISC-V core with the resources required, while reducing the hardware overhead due to, for instance, instructions and registers not needed. Using TailoredCore, we achieve up to 38% savings in registers and 12% in logic elements when generating cores for five CHStone benchmark applications and implementing them on an FPGA. These savings in the area also correspond to a reduction of the required power and energy.

Keywords:
Computer science Benchmark (surveying) Field-programmable gate array Embedded system Overhead (engineering) Reduced instruction set computing Implementation Computer architecture Multi-core processor Resource (disambiguation) Reduction (mathematics) Instruction set Parallel computing Operating system Computer network

Metrics

2
Cited By
0.26
FWCI (Field Weighted Citation Impact)
16
Refs
0.47
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Citation History

Topics

Parallel Computing and Optimization Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Embedded Systems Design Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Interconnection Networks and Systems
Physical Sciences →  Computer Science →  Computer Networks and Communications
© 2026 ScienceGate Book Chapters — All rights reserved.