This paper presents an application-specific 32-bit micro-processor for energy metering based on RISC-V Instruction Set Architecture (ISA). The proposed processor features a three-stage pipeline with separate write-back ports and has low complexity in control. We also propose novel instructions for energy accumulation of energy metering. Compared with other designs, using the instructions can improve the performance of energy accumulation. The design is implemented on Xilinx Kintex-7 (xc7k410t-3fbg676) FPGA.
Emre ÖzerJedrzej KufelShvetank PrakashAlireza RaisiardaliOlof KindgrenRonald J. WongNelson NgDamien JausseranFeras AlkhalilDavid KongGage HillsRichard PriceVijay Janapa Reddi
Alexander WalsemannM. KaragounisAlexander StanitzkiDietmar Tutsch