Investigation of Self-Heating Effects in Gate-All-Around MOSFETs With Vertically Stacked Multiple Silicon Nanowire Channels

Abstract

The self-heating effects (SHEs) in gate-all-around (GAA) MOSFETs with vertically stacked silicon nanowire (SiNW) channels are investigated. Direct observations using thermal images, electrical proof measurements, and supportive numerical simulations are carried out to verify the SHEs. This paper examines the location of hot spots as well as heat dissipation paths (heat sink) depending on the device geometry, and the electrical degradation produced by the SHEs. It also includes the estimation of the surface temperature of the GAA MOSFET and the average temperature across the bulk channel. Design parameters for improved management of the heat dissipation in a device are suggested. This investigation can contribute to improve the device performance and reliability of a 3-D stacked structure.