JOURNAL ARTICLE
Reduction of wafer arcing during high aspect ratio etching
Abstract
We present several efforts for arcing reduction during high aspect ratio etching. Strategies including pulsing etching adjustments, ex situ multi-cyclic etch approach, flush step incorporation, E-chuck voltage operation, cap material, etc. are explored. The details are discussed in the paper.
Keywords:
Etching (microfabrication) Wafer Materials science Reduction (mathematics) Reactive-ion etching Optoelectronics Dry etching Electric arc Aspect ratio (aeronautics) Voltage reduction Voltage Nanotechnology Electrical engineering Electrode Engineering Chemistry Layer (electronics)
Metrics
4
Cited By
0.17
FWCI (Field Weighted Citation Impact)
2
Refs
0.56
Citation Normalized Percentile
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Citation History
Topics
Vacuum and Plasma Arcs
Physical Sciences → Physics and Astronomy → Atomic and Molecular Physics, and Optics
Silicon Carbide Semiconductor Technologies
Physical Sciences → Engineering → Electrical and Electronic Engineering
Welding Techniques and Residual Stresses
Physical Sciences → Engineering → Mechanical Engineering
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