Silicon Photonic wafer fabrication for education

Abstract

Silicon Photonics is a promising new technology for realizing efficient, high performance interconnects. There is a growing need for educating future engineers on how to design, fabricate, test and package Silicon photonic circuits. Here we demonstrate a Silicon photonic process suitable for an educational institution with i-line lithography capabilities. We have developed a suitable process for realizing passive photonic devices (i.e. waveguides, interferometric structures and fiber-chip grating couplers). The process is realized in a CMOS compatible environment which has been in use since 1986 to teach microelectronic engineering. And is now also being used to support the AIM Photonics Academy education mission. Specifically, an array of TM-polarized grating couplers with a ring resonator was fabricated with a lithographic resolution of 0.325 µm on an SOI wafer. The setup time and run time required was 3 days in comparison to the long wait time in the industry. Optimization of the resolution using ARC i-CON-7, diluted OiR 620 and the etch selectivity of the Silicon to the 1:1 OiR 620:PGMEA was key to the student run fabrication process and is supported by the Optical microscope and SEM results.