Bulk encryption crypto-processor for smart cards: design and implementation

Abstract

The evolution of a cipher has no practical impact if it has only a theoretical background. Every encryption algorithm should exploit as much as possible the conditions of the specific system without omitting the physical, area and timing limitations. The smart card environment lacks system resources, but commercial and economic transactions via smart cards demand the use of certificated and secure cryptographic methods. This fact requires new ways of designing architectures for secure and reliable smart card systems. A crypto-processor architecture and its VLSI implementation for smart card bulk encryption is proposed. The proposed architecture achieves 30% area resource reduction and has a throughput value much greater than smart card standards specify.