Security processor for bulk encryption

Abstract

One of the fundamental challenges for the designers of the crypto processors is to provide the bulk encryption for network applications. In today's ultra-competitive marketplace, the low cost and flexibility for newer algorithms are the key requirements for any crypto processor. This paper describes a programmable security processor with powerful instruction sets to cater for current as well as future security algorithms. The architecture is specially designed and optimized for IPSEC applications, involving authentication, encryption, key generation and digital signature generation/verification. The novel architecture can be used for wire speed security by adding multiple layers of crypto engines.