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The gm/ID Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits
P. Jespers
Year:
2009
DOI:
10.1007/978-0-387-47101-3
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Keywords:
CMOS
Sizing
Analogue electronics
Electronic circuit
Electronic engineering
Voltage
Computer science
Electrical engineering
Engineering
Chemistry
Metrics
125
Cited By
1.55
FWCI (Field Weighted Citation Impact)
1
Refs
0.94
Citation Normalized Percentile
Is in top 1%
Is in top 10%
Citation History
Topics
Advancements in Semiconductor Devices and Circuit Design
Physical Sciences → Engineering → Electrical and Electronic Engineering
Low-power high-performance VLSI design
Physical Sciences → Engineering → Electrical and Electronic Engineering
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