Abstract

We report on RF characterization of vertical, 100-nm-gate length InAs nanowire MOSFETs, utilizing wrap-gate technology and Al2O3 high-kappa gate oxide. The transistors show f(t)=5.6 GHz and f(max)=22 GHz, mainly limited by parasitic capacitances. The RF device performance is described using a hybrid-pi model taking hole generation at the drain into account. Electrostatic modeling of the parasitic capacitances for arrays of vertical nanowires indicates that a strong reduction in extrinsic capacitances can be achieved for devices with a small inter-wire separation.

Keywords:
Nanowire MOSFET Optoelectronics Capacitance Transistor Materials science Topology (electrical circuits) Electrical engineering Physics Engineering Quantum mechanics Electrode Voltage

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Citation History

Topics

Nanowire Synthesis and Applications
Physical Sciences →  Engineering →  Biomedical Engineering
Advancements in Semiconductor Devices and Circuit Design
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Semiconductor materials and devices
Physical Sciences →  Engineering →  Electrical and Electronic Engineering

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JOURNAL ARTICLE

High frequency vertical InAs nanowire MOSFETs integrated on Si substrates

Sofia JohanssonSepideh Gorji GhalamestaniMikael EgardMattias BorgMartin BergLars‐Erik WernerssonErik Lind

Journal:   Physica status solidi. C, Conferences and critical reviews/Physica status solidi. C, Current topics in solid state physics Year: 2011 Vol: 9 (2)Pages: 350-353
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