JOURNAL ARTICLE
A parallel VLSI implementation of Viterbi algorithm for accelerated word recognition
Abstract
A hardware VLSI implementation of the Viterbi algorithm is presented. The Viterbi algorithm is used to solve a word recognition problem using a hidden Markov model. In order to accelerate the speed of computation for real-time word recognition, the inherent parallelism in the recursion step of the algorithm is exploited. Details of the hardware implementation and experimental results are discussed.< >
Keywords:
Viterbi algorithm Computer science Very-large-scale integration Recursion (computer science) Word (group theory) Parallel computing Hidden Markov model Computation Algorithm Markov chain Markov model Artificial intelligence Embedded system Machine learning Mathematics
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Topics
Algorithms and Data Compression
Physical Sciences → Computer Science → Artificial Intelligence
Advanced Wireless Communication Techniques
Physical Sciences → Engineering → Electrical and Electronic Engineering
Machine Learning in Bioinformatics
Life Sciences → Biochemistry, Genetics and Molecular Biology → Molecular Biology
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