Abstract

There has been tremendous advancement in the development of novel nano-technologies for future CMOS nanoelectronics. The challenges and opportunities have been widely discussed with the focus on the choice of materials, processes of implementation and innovative non-classical device architectures to continuously meet the scaling requirements. Among the non-classical device architectures, Gate All Around (GAA) FET with nanowire (NW) channel body offers the ultimate electro-static control and thus has the potential to push the gate length to few nanometers. The key challenge for NWs to be widely adopted in semiconductor industry is that they have to be formed by large scale manufacturing methods. Especially, for CMOS applications, the methods should not lead to contamination issues.

Keywords:
Nanoelectronics CMOS Nanowire Nanotechnology Nanometre Silicon nanowires Silicon Materials science Logic gate Scaling Computer science Electronic engineering Electrical engineering Engineering physics Engineering Optoelectronics

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3
Cited By
0.62
FWCI (Field Weighted Citation Impact)
1
Refs
0.73
Citation Normalized Percentile
Is in top 1%
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Citation History

Topics

Advancements in Semiconductor Devices and Circuit Design
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Nanowire Synthesis and Applications
Physical Sciences →  Engineering →  Biomedical Engineering
Semiconductor materials and devices
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
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