Through Silicon Interconnect Using grayscale Lithography for MEMS Applications

Abstract

In this work a process for cost effective, dual sides interconnect with through silicon vias (TSV’s) is presented. The process flow is optimized for straightforward process integration, not for high density, making it suitable for MEMS applications. It requires only conventional backend processing like PECVD oxide and PVD metallization. To obtain a good PVD step coverage, low aspect ratios tapered through silicon vias are required. Gray-scale lithography is employed to control the via profiles. A process sequence is developed to add the double side metallization process including the TSV’s to an existing single side metallization process. To measure the low-ohmic TSV’s interconnects, special Kelvin structure with dual side interconnect are designed and fabricated on 300 μm thick wafers. A low median value of 36 mΩ was found demonstrating the capabilities of the process.