Parallel hierarchical clustering algorithms on processor arrays with a reconfigurable bus system

Horng-Ren Tsai; Shi Jinn Horng; Shung-Shing Lee; Shun-Shan Tsar; Tzong‐Wann Kao

doi:10.1016/s0031-3203(96)00119-7

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Parallel hierarchical clustering algorithms on processor arrays with a reconfigurable bus system

Horng-Ren Tsai Shi Jinn Horng Shung-Shing Lee Shun-Shan Tsar Tzong‐Wann Kao

Year: 1997 Journal: Pattern Recognition Vol: 30 (5)Pages: 801-815 Publisher: Elsevier BV

DOI: 10.1016/s0031-3203(96)00119-7

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Keywords:

Cluster analysis Computer science Computation Parallel computing Parallel algorithm Algorithm Constant (computer programming) Factor (programming language) Artificial intelligence

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Digital Image Processing Techniques

Physical Sciences → Computer Science → Computer Vision and Pattern Recognition

Advanced Data Compression Techniques

Physical Sciences → Computer Science → Computer Vision and Pattern Recognition

Algorithms and Data Compression

Physical Sciences → Computer Science → Artificial Intelligence

Parallel hierarchical clustering algorithms on processor arrays with a reconfigurable bus system

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