A computer program was used to predict the coefficient of thermal expansion (CTE) of four printed wiring board (PWB) designs. Designs consisted of low CTE materials, E glass/epoxy and copper. Twenty PWBs were fabricated to duplicate four computer models. CTE was measured by a strain gauge technique developed at Boeing. The measured CTE was then compared with the predicted CTE value and a design curve developed. Following CTE verification, the PWBs were assembled with 20, 44, 68, and 84 I/O leadless ceramic chip carriers. The printed wiring assemblies were then thermal shocked from −55 to 125°C and continuously monitored to detect the first solder failure for each I/O chip carrier. The results illustrate the dependence of solder joint life on PWB CTE and verify the use of a computer model to design surface mount PWBs.
P. M. HallT. D. DudderarJ. Argyle
Z. N. SanjanaRam S. RaghavaJames Marchetti