Electrical Characteristics of ZrO₂Gate Dielectric Deposited on Ultrathin Silicon Capping Layer for SiGe Metal-Oxide-Semiconductor Device Applications

Abstract

The electrical characteristics of ZrO2 were investigated relative to its use in SiGe metal-oxide-semiconductor (MOS) gate dielectric applications. Compared to ZrO2 directly deposited on SiGe, ZrO2, when deposited on a silicon capping layer shows a significant improvement in electrical characteristics such as low leakage current, negligible hysteresis, less fixed charge density and a lower interface state density (Dit) after low-temperature wet vapor annealing. The improvement in the electrical characteristics of ZrO2, with a silicon capping layer can be attributed to the negligible Ge segregation and surface roughness at the interface. Based on an Auger electron spectroscopy (AES) depth profile of Ge, we were able to confirm that Ge is segregated at the interface.