Real-time multi-view rendering based on FPGA

Abstract

With the development of display hardware, computing power, transmission and rendering algorithm, 3DTV is becoming the most promising technology that provides the users a more natural viewing experience than 2D displays. But most 3D movies need to wear 3D glasses to watch. Naked eye 3D is the ultimate goal of the development of 3D technology. Multi-view rendering by depth image based rendering (DIBR) is one of the key and difficult technologies in the naked eye 3DTV system. In this paper, a multi-view rendering hardware architecture based on FPGA consisting of hybrid parallel DBIR and pipeline interlacing are proposed to improve the performance. The results show that our algorithm has comparable efficiency, and hence it is promising for practical application.