An improved gate capacitance model for GaAs MESFETs

J. Kotz

doi:10.1109/gaas.1996.567843

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An improved gate capacitance model for GaAs MESFETs

J. Kotz

Year: 2002 Vol: 34 Pages: 171-174

DOI: 10.1109/gaas.1996.567843

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Abstract

This paper describes the measurement and modeling of gate capacitance for self-aligned, LDD GaAs EFETs and DFETs. An improved, scalable gate capacitance model is presented which is suitable for compact device simulation.

Keywords:

Capacitance Gallium arsenide Materials science Optoelectronics Scalability Parasitic capacitance Logic gate Electronic engineering Computer science Electrical engineering Engineering Physics Electrode

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Radio Frequency Integrated Circuit Design

Physical Sciences → Engineering → Electrical and Electronic Engineering

Semiconductor materials and devices

Physical Sciences → Engineering → Electrical and Electronic Engineering

Advancements in Semiconductor Devices and Circuit Design

Physical Sciences → Engineering → Electrical and Electronic Engineering

An improved gate capacitance model for GaAs MESFETs

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