BOOK-CHAPTER

Formal Specification for Hardware Verification

Keywords:
Datapath Intelligent verification Computer science High-level verification Verification Functional verification Runtime verification Formal verification Property (philosophy) Formal methods Software verification Formal equivalence checking Computer architecture Programming language Embedded system Software Software system Software construction

Metrics

1
Cited By
0.27
FWCI (Field Weighted Citation Impact)
10
Refs
0.52
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Topics

Formal Methods in Verification
Physical Sciences →  Computer Science →  Computational Theory and Mathematics
Embedded Systems Design Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Real-Time Systems Scheduling
Physical Sciences →  Computer Science →  Hardware and Architecture

Related Documents

JOURNAL ARTICLE

Formal specification in VHDL for hardware verification

R. ReetzK. SchneiderT. Kropf

Journal:   Proceedings Design, Automation and Test in Europe Year: 2002 Pages: 257-263
JOURNAL ARTICLE

Formal hardware specification and verification using prolog

Zmago BrezočnikB. Horvat

Journal:   Microprocessing and Microprogramming Year: 1989 Vol: 27 (1-5)Pages: 163-170
JOURNAL ARTICLE

Formal specification and verification of hardware designs

S. RameshSana RaoG. SivakumarPurandar Bhaduri

Journal:   Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE Year: 1998 Vol: 3412 Pages: 261-261
JOURNAL ARTICLE

Formal hardware specification languages for protocol compliance verification

A.S. BunkerGanesh GopalakrishnanSally A. McKee

Journal:   ACM Transactions on Design Automation of Electronic Systems Year: 2004 Vol: 9 (1)Pages: 1-32
© 2026 ScienceGate Book Chapters — All rights reserved.