A RISC-V SoC With Reconfigurable Custom Instructions on a Synthesized eFPGA Fabric in 22nm FinFET

Prashanth Mohan; Siddharth Das; Ken Mai

doi:10.1109/lssc.2025.3618942

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A RISC-V SoC With Reconfigurable Custom Instructions on a Synthesized eFPGA Fabric in 22nm FinFET

Prashanth Mohan Siddharth Das Ken Mai

Year: 2025 Journal: IEEE Solid-State Circuits Letters Vol: 8 Pages: 321-324 Publisher: Institute of Electrical and Electronics Engineers

DOI: 10.1109/lssc.2025.3618942

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Logic gate Transistor CMOS Random access memory

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A RISC-V SoC With Reconfigurable Custom Instructions on a Synthesized eFPGA Fabric in 22nm FinFET

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