JOURNAL ARTICLE

An Optimization Method for Accelerating Convolutional Neural Networks Based on FPGA

Keywords:
Convolutional neural network Artificial neural network Field-programmable gate array Feature (linguistics) Key (lock) Acceleration

Metrics

0
Cited By
0.00
FWCI (Field Weighted Citation Impact)
6
Refs
0.34
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Topics

VLSI and FPGA Design Techniques
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Wireless Signal Modulation Classification
Physical Sciences →  Computer Science →  Artificial Intelligence
Advanced Neural Network Applications
Physical Sciences →  Computer Science →  Computer Vision and Pattern Recognition

Related Documents

JOURNAL ARTICLE

FPGA-Based Design for Accelerating 3D Convolutional Neural Networks

Yuesong Yang

Journal:   International Journal of Frontiers in Engineering Technology Year: 2023 Vol: 5 (3)
JOURNAL ARTICLE

Accelerating convolutional neural networks: Exploring FPGA-based architectures and challenges

H. Ye

Journal:   Journal of Physics Conference Series Year: 2024 Vol: 2786 (1)Pages: 012004-012004
© 2026 ScienceGate Book Chapters — All rights reserved.