JOURNAL ARTICLE

FPGA-Based Deep Convolutional Neural Network Optimization Method

Abstract

With the increasing demand for computing speed and real-time data processing in various fields, deep learning and convolutional neural networks are more and more widely used in the field of computer vision. FPGA-based deep convolutional neural networks (CNN) have been proposed and developed rapidly due to its high parallel processing ability, portability, and low power consumption. To further improve the network efficiency, this paper studies the software acceleration tool Vivado HLS provided by Xilinx, the quantification and pruning of convolution neural network model, which can effectively optimize the network model and accelerate the reasoning process.

Keywords:
Computer science Convolutional neural network Software portability Field-programmable gate array Deep learning Pruning Artificial intelligence Convolution (computer science) Artificial neural network Process (computing) Computer architecture Field (mathematics) Speedup Embedded system Computer engineering Machine learning Parallel computing

Metrics

7
Cited By
0.65
FWCI (Field Weighted Citation Impact)
7
Refs
0.73
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Citation History

Topics

Image Processing Techniques and Applications
Physical Sciences →  Engineering →  Media Technology
CCD and CMOS Imaging Sensors
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Neural Networks and Applications
Physical Sciences →  Computer Science →  Artificial Intelligence
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