FPGA-Based Hardware Accelerator Design for Convolutional Neural Networks

Jiayan Chen

doi:10.2991/978-94-6463-821-9_74

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FPGA-Based Hardware Accelerator Design for Convolutional Neural Networks

Jiayan Chen

Year: 2025 Advances in engineering research/Advances in Engineering Research Pages: 765-775 Publisher: Atlantis Press

DOI: 10.2991/978-94-6463-821-9_74

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Keywords:

Field-programmable gate array Convolutional neural network Computer science Computer hardware Hardware acceleration Embedded system Computer architecture Artificial intelligence

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Neural Networks and Applications

Physical Sciences → Computer Science → Artificial Intelligence

CCD and CMOS Imaging Sensors

Physical Sciences → Engineering → Electrical and Electronic Engineering

Image Processing Techniques and Applications

Physical Sciences → Engineering → Media Technology

FPGA-Based Hardware Accelerator Design for Convolutional Neural Networks

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