Gate-Level Hardware Trojan Detection Method Based on K-Hypergraph

Abstract

To shorten the development cycle of integrated circuit (IC) chips, third-party IP cores (3PIPs) are widely used in the design phase; however, these 3PIPs may be untrusted, creating potential vulnerabilities. Attackers may insert hardware Trojans (HTs) into 3PIPs, resulting in the leakage of critical information, alteration of circuit functions, or even physical damage to circuits. This has attracted considerable attention, leading to increased research efforts focusing on detection methods for HTs. This paper proposes a K-Hypergraph model construction methodology oriented towards the abstraction of HT characteristics, aiming at detecting HTs. This method employs the K-nearest neighbors (K-NN) algorithm to construct a hypergraph model of gate-level netlists based on the extracted features. To ensure data balance, the SMOTE algorithm is employed before constructing the K-Hypergraph model. Then, the K-Hypergraph model is trained, and the weights of the K-Hypergraph are updated to accomplish the classification task of distinguishing between Trojan nodes and normal nodes. The experimental results demonstrate that, when evaluating Trust-Hub benchmark performance indicators, the proposed method has average balanced accuracy of 91.18% in classifying Trojan nodes, with a true positive rate (TPR) of 92.12%.