Variation-Aware Design Methodology for SRAM-Based Multi-Bit Analog Compute-in-Memory Architecture

Dinesh Kushwaha; Rajiv Joshi; Anand Bulusu; Sudeb Dasgupta

doi:10.1109/newcas58973.2024.10666330

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Variation-Aware Design Methodology for SRAM-Based Multi-Bit Analog Compute-in-Memory Architecture

Dinesh Kushwaha Rajiv Joshi Anand Bulusu Sudeb Dasgupta

Year: 2024 Pages: 243-247

DOI: 10.1109/newcas58973.2024.10666330

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Keywords:

Static random-access memory Computer science Variation (astronomy) Computer architecture Architecture Memory architecture Bit (key) Embedded system Computer hardware

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Interconnection Networks and Systems

Physical Sciences → Computer Science → Computer Networks and Communications

VLSI and Analog Circuit Testing

Physical Sciences → Computer Science → Hardware and Architecture

Advanced Memory and Neural Computing

Physical Sciences → Engineering → Electrical and Electronic Engineering

Variation-Aware Design Methodology for SRAM-Based Multi-Bit Analog Compute-in-Memory Architecture

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