Geometrical Redesigning Method of Semiconductor Packages using Finite Element Analysis

Abstract

Semiconductor packaging technology is an integral part of modern electronics and digital equipment. These work to protect the integrity of any electronic design, acting as a hard, protective shell to the soft and sensitive logical components. Semiconductor packages will experience pressure and heat loads throughout the device's usage. It's lifespan and effectively in protecting the actual electronic device will be affected by warpage due to thermal cycling during the manufacturing process. Materials expand and contract due to thermal cycling between heating and cooling, respectively. A composite of materials with conflicting thermomechanical properties will change volume in different rates, causing stress in the overall design. This leads to warpage of the semiconductor package, which leads to cracking and delamination in components of the electronic device. Careful design of the geometry of a semiconductor package can mitigate stress and deformation. This study concentrates on the active metal brazed ceramic substrate semiconductor packages and attempts to generate a methodology for redesigning the geometry of this specific package as issues arise due to heat-driven warpage during manufacturing.