Ultra-Narrow Silicon Nanowire (～3 nm) Gate-All-Around MOSFETs

Narendra Kumar Singh; Yein Lim; S.C. Rustagi; L. K. Bera; Ayush Agarwal; G. Q. Lo; N. Balasubramanian; Kwong D.-L.

doi:10.7567/ssdm.2006.p-3-25

ScienceGate Book Chapters

JOURNAL ARTICLE

Ultra-Narrow Silicon Nanowire (～3 nm) Gate-All-Around MOSFETs

Narendra Kumar Singh Yein Lim S.C. Rustagi L. K. Bera Ayush Agarwal G. Q. Lo N. Balasubramanian Kwong D.-L.

Year: 2006 Vol: 2006 Pages: 548-549

DOI: 10.7567/ssdm.2006.p-3-25

Get Full-Text PDF Get Analytical Report

Keywords:

Nanowire MOSFET Optoelectronics Silicon nanowires Materials science Silicon Engineering physics Nanotechnology Electrical engineering Physics Transistor Engineering Voltage

Metrics

Cited By

0.00

FWCI (Field Weighted Citation Impact)

Refs

0.02

Citation Normalized Percentile

Is in top 1%

Is in top 10%

Citation History

Topics

Advancements in Semiconductor Devices and Circuit Design

Physical Sciences → Engineering → Electrical and Electronic Engineering

Nanowire Synthesis and Applications

Physical Sciences → Engineering → Biomedical Engineering

Semiconductor materials and devices

Physical Sciences → Engineering → Electrical and Electronic Engineering

Ultra-Narrow Silicon Nanowire (～3 nm) Gate-All-Around MOSFETs

Metrics

Citation History

Topics

Related Documents

Gate-all-around silicon nanowire MOSFETs and circuits

Gate-all-around MOSFETs: lateral ultra-narrow (≤10 nm) fin as channel body

Compact modeling of gate-all-around silicon nanowire MOSFETs

CMOS compatible Gate-All-Around Vertical silicon-nanowire MOSFETs

Structure Effects in the gate-all-around Silicon Nanowire MOSFETs