JOURNAL ARTICLE

Boolean factoring and decomposition of logic networks

Abstract

This paper presents new methods for restructuring logic networks based on fast Boolean techniques. The basis for these are 1) a cut-based view of a logic network, 2) exploiting the uniqueness and speed of disjoint-support decompositions, 3) a new heuristic for speeding these up, 4) extending these to general decompositions, and 5) limiting local transformations to functions with 16 or less inputs so that fast truth table manipulations can be used in all operations. Boolean methods lessen the structural bias of algebraic methods, while still allowing for high speed and multiple iterations. Experimental results on K-LUT networks show an average additional reduction of 5.4% in LUT count, while preserving delay, compared to heavily optimized versions of the same networks.

Keywords:
Computer science Heuristic Disjoint sets Boolean function Lookup table Factoring Truth table Logic synthesis Logic optimization Boolean circuit Reduction (mathematics) Algorithm Logic gate Theoretical computer science Mathematics Discrete mathematics Artificial intelligence

Metrics

30
Cited By
4.10
FWCI (Field Weighted Citation Impact)
40
Refs
0.95
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Citation History

Topics

Formal Methods in Verification
Physical Sciences →  Computer Science →  Computational Theory and Mathematics
VLSI and FPGA Design Techniques
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Low-power high-performance VLSI design
Physical Sciences →  Engineering →  Electrical and Electronic Engineering

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