Automatic Generation of Application-Specific FPGA Overlays with RapidWright

Abstract

In this paper, we introduce Application-Specific FPGA Overlays (AS-Overlays), a new approach to automatically generate overlays from high-level description language applications that can achieve bare-metal performances. Our approach is based on the automatic extraction of hardware kernels from data flow applications. Extracted kernels are then leveraged for application-specific generation of hardware accelerators. The reconfiguration of the overlay is done with RapidWright which allows to bypass the HDL design flow. Through prototyping, we demonstrated the viability and relevance of our approach. Experiments show a productivity improvement up to 20× compared to the state of the art FPGA overlays, while achieving over 1.33× higher Fmax than direct FPGA implementation and the possibility of lower resource and power consumption compared to bare metal.