Design and Simulation of Single-Precision Inexact Floating-Point Adder/Subtractor

KUMAR B. VENKATA VINOD; BASHA SK. MAHABOOB

doi:10.26634/jele.6.4.8087

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Design and Simulation of Single-Precision Inexact Floating-Point Adder/Subtractor

KUMAR B. VENKATA VINOD BASHA SK. MAHABOOB

Year: 2016 Journal: i-manager’s Journal on Electronics Engineering Vol: 6 (4)Pages: 7-7

DOI: 10.26634/jele.6.4.8087

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Keywords:

Subtractor Adder Single-precision floating-point format Floating point Computer science Arithmetic Double-precision floating-point format Point (geometry) Parallel computing Algorithm Mathematics Latency (audio) Telecommunications Geometry

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Analog and Mixed-Signal Circuit Design

Physical Sciences → Engineering → Biomedical Engineering

Numerical Methods and Algorithms

Physical Sciences → Computer Science → Computational Theory and Mathematics

Experimental Learning in Engineering

Physical Sciences → Engineering → Media Technology

Design and Simulation of Single-Precision Inexact Floating-Point Adder/Subtractor

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