SOI monolithic pixel technology for radiation image sensor

Abstract

Silicon-On-Insulator (SOI) technology is a suitable choice to realize monolithic radiation imaging device as it involves a separate thick silicon layer in addition to a circuit layer. However, there are several issues to overcome for using radiation sensors and CMOS LSI circuits on a same die, i.e., the back-gate effect, coupling between sensors and circuits, and the total ionization dose (TID) effect. These issues have been solved by introducing a middle Si layer between the sensor and circuit layer (double SOI). The back-gate effect and the coupling are successfully suppressed and radiation hardness is increased by more than 100 kGy(Si) by introducing bias in the middle Si layer. In addition, a small pixel size is achieved by using the PMOS and NMOS active merge technique in SOI. This enables a much smaller layout size than that in the bulk CMOS process with the same feature size, while maintaining a high enough analog operation voltage. An example of a counting-type detector is also shown.