Scheduling Algorithms for Compiler of Loop Pipelining Designs on FPGAs

Zhijian Lu; Yanxia Wu; Zhenhua Guo; Guochang Gu

doi:10.4156/ijact.vol4.issue23.9

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JOURNAL ARTICLE

Scheduling Algorithms for Compiler of Loop Pipelining Designs on FPGAs

Zhijian Lu Yanxia Wu Zhenhua Guo Guochang Gu

Year: 2012 Journal: International Journal of Advancements in Computing Technology Vol: 4 (23)Pages: 67-78 Publisher: The International Association for Information, Culture, Human and Industry Technology (AICIT)

DOI: 10.4156/ijact.vol4.issue23.9

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Keywords:

Computer science Software pipelining Parallel computing Compiler Field-programmable gate array Scheduling (production processes) Loop optimization Computer architecture Algorithm Optimizing compiler Embedded system Programming language Mathematical optimization

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Embedded Systems Design Techniques

Physical Sciences → Computer Science → Hardware and Architecture

Interconnection Networks and Systems

Physical Sciences → Computer Science → Computer Networks and Communications

VLSI and FPGA Design Techniques

Physical Sciences → Engineering → Electrical and Electronic Engineering

Scheduling Algorithms for Compiler of Loop Pipelining Designs on FPGAs

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