A CMOS HDSL2 analog front-end

A. Gattani; D.W. Cline; P.J. Hurst; P.M. Mosinskis

doi:10.1109/4.890311

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A CMOS HDSL2 analog front-end

A. Gattani D.W. Cline P.J. Hurst P.M. Mosinskis

Year: 2000 Journal: IEEE Journal of Solid-State Circuits Vol: 35 (12)Pages: 1964-1975 Publisher: Institute of Electrical and Electronics Engineers

DOI: 10.1109/4.890311

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Abstract

A 5-V 0.5-/spl mu/m CMOS analog front-end (AFE) IC for HDSL2 incorporates transmit digital-to-analog converter (DAC), transmit filters, output buffer, receive AGC, and receive ADC. The AFE consumes 525 mW and provides better than 82-dB signal-to-noise-and-distortion ratio (SNDR) in both transmit and receive paths. It supports variable data rates from 64 kb/s up to 2.32 Mb/s, and enables an HDSL2 system to achieve better than 14 kft of noise-free reach (on 26-gauge wire) at 1.544 Mb/s.

Keywords:

CMOS Analog front-end Front and back ends Successive approximation ADC Electronic engineering Noise (video) Analog signal Electrical engineering Distortion (music) Analog-to-digital converter Computer science Physics Engineering Comparator Amplifier Voltage Digital signal processing

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Analog and Mixed-Signal Circuit Design

Physical Sciences → Engineering → Biomedical Engineering

Advancements in PLL and VCO Technologies

Physical Sciences → Engineering → Electrical and Electronic Engineering

Photonic and Optical Devices

Physical Sciences → Engineering → Electrical and Electronic Engineering

A CMOS HDSL2 analog front-end

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