High Performance VLSI Architecture for Data Clustering Targeted at Computer Vision

Abstract

This paper presents a high performance architecture for the important task of unsupervised data clustering in computer vision applications. This architecture is suitable for VLSI implementation, as it exploits paradigms of massive connectivity like those inspired by neural networks, and parallelism and functionality integration that can be afforded by emerging nanometer semiconductor technologies. By utilizing a "global-systolic, local-hyper-connected" architectural approach, this architecture can be suitable for the processing of real time DVD quality video at the highest rate allowed by the MPEG-2 standard. This implies a performance improvement of 118 times or better than approaches using conventional compute platforms.