Architecture of the NS32532-a single chip VLSI high performance CPU

Abstract

The 32-bit NS32532 is fabricated in 1.25- mu m, double metal CMOS. It achieves a scalar performance of 15 MIPS (million instructions per second) peak, 8-10 MIPS average, and can execute 15 million floating point operations per second. The CPU's four-stage instruction execution pipeline, its unique floating point arithmetic support, the architecture of its internal instruction and data caches, and its branch prediction mechanism are presented. The special instructions and cache coherency mechanisms for multiprocessing support are described.< >