JOURNAL ARTICLE

Diagnosis of small delay defects arising due to manufacturing imperfections using path delay measurements

Abstract

A boolean satisfiability based approach capable of identifying the location of embedded segments with small delay defects, arising due to process variations, is proposed. Furthermore, a novel algorithmic framework is presented to derive swift solutions for the generated conjunctive normal form. To our knowledge, this is the first approach which guarantees that one of the solutions describes the actual defective configurations. Experimental analysis on ISCAS and ITC benchmark suites show that the proposed approach is highly scalable and identifies the location of multiple delay defects.

Keywords:
Satisfiability Path (computing) Scalability Benchmark (surveying) Computer science Process (computing) Delay calculation Boolean satisfiability problem Algorithm Boolean function Conjunctive normal form Scaling Computer engineering Theoretical computer science Propagation delay Mathematics Computer network

Metrics

6
Cited By
1.40
FWCI (Field Weighted Citation Impact)
19
Refs
0.85
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Citation History

Topics

VLSI and Analog Circuit Testing
Physical Sciences →  Computer Science →  Hardware and Architecture
Integrated Circuits and Semiconductor Failure Analysis
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Advancements in Photolithography Techniques
Physical Sciences →  Engineering →  Electrical and Electronic Engineering

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