2.5-Gb/s low-jitter low-power monolithically integrated optical receiver

Yingmei Chen; Zhigong Wang; Li Zhang; Wei Li

doi:10.1007/s10470-011-9698-2

ScienceGate Book Chapters

JOURNAL ARTICLE

2.5-Gb/s low-jitter low-power monolithically integrated optical receiver

Yingmei Chen Zhigong Wang Li Zhang Wei Li

Year: 2011 Journal: Analog Integrated Circuits and Signal Processing Vol: 71 (3)Pages: 445-451 Publisher: Springer Science+Business Media

DOI: 10.1007/s10470-011-9698-2

Get Full-Text PDF Get Analytical Report

Keywords:

Jitter Preamplifier CMOS Pseudorandom binary sequence Demultiplexer dBc Physics Electrical engineering Multiplexer Electronic engineering Header Amplifier Computer science Engineering Multiplexing

Metrics

Cited By

0.00

FWCI (Field Weighted Citation Impact)

Refs

0.16

Citation Normalized Percentile

Is in top 1%

Is in top 10%

Citation History

Topics

Advancements in PLL and VCO Technologies

Physical Sciences → Engineering → Electrical and Electronic Engineering

Photonic and Optical Devices

Physical Sciences → Engineering → Electrical and Electronic Engineering

Semiconductor Lasers and Optical Devices

Physical Sciences → Engineering → Electrical and Electronic Engineering

2.5-Gb/s low-jitter low-power monolithically integrated optical receiver

Metrics

Citation History

Topics

Related Documents

Low-jitter, low-power 2.5-Gb/s one-chip optical receiver IC with 1:8 DEMUX

A low-jitter low-power monolithically integrated optical receiver for SDH STM-16

A low-noise monolithically integrated 1.5 Gb/s optical receiver in 0.6-μm bicmos technology

A Low-Power Hybrid-Integrated 40-Gb/s Optical Receiver in Silicon

8 Gb/s CMOS compatible monolithically integrated silicon optical receiver