The FPGA Implementation of Single-Precision Floating-Point Adder

Abstract

A design of single precision floating point adder based on FPGA is presented,by analysing the form of real number formed on IEEE 754 and the storage format of IEEE 754 single-precision floating point,the addition arithmetic process which is easy to realized by using FPGA is put forward,the split of module based on the arithmetic process facilitates the realization of pipeline designing,so the single precision floating point adder introduce by this paper has powerful operation process ability.