CMOS-bipolar monolithic integrated-circuit technology

Abstract

This paper describes a new integrated circuit process in which CMOS and bipolar integrated-circuit technologies have been monolithically mated without compromising the performance characteristics of either the bipolar or the CMOS devices. The approach taken has been the addition of the required steps for fabricating CMOS devices to the basic linear-integrated-circuit process. This approach results in the need for one additional photoresist step over the process used for linear integrated circuits with compensating MOS capacitors. The basic processing steps, including the ion-implantation technique used to form the p-wells for the NMOS devices, are presented and discussed. Typical characteristics of the bipolar and CMOS devices fabricated with this process are shown. An amplifier circuit using this process has been fabricated. PMOS input devices are used along with the bipolar devices that provide the functions of current mirrors and high-gain amplifiers. CMOS devices are used in an inverter output stage.