Hardware computing for brain network analysis

Abstract

As the scale of computer clusters and supercomputers is getting larger, the problem of power consumption and heat dissipation has become the biggest obstacle for the ever growing need for computation. Designing platforms for specific applications using the reconfigurable logic such as Field Programmable Gate Arrays (FPGAs) or highly parallel processors such as Graphic Processing Units (GPUs) will dramatically increase power efficiency. This is the concept of domain specific computing. Combining the advantages of different platforms to build a heterogeneous computing platform is the trend of domain specific computing. On the other hand, the research on brain networks plays a vital role in understanding the connectivity patterns of the human brain and disease-related alterations. Recent studies have suggested a noninvasive way of modeling and analyzing the human cortical networks with MRI by graph theory based approaches. However, both the construction and analysis of brain networks require tremendous computation. Currently, only hundreds of nodes can be analyzed due to lack of computing power. By increasing the number of nodes, the resolution of cortical networks will be greatly enhanced, thus hopefully helps the early diagnosis of brain diseases such as Alzheimer's disease. A well-designed computing platform is the key to this problem. In this work, we inject the power of heterogeneous hardware computing into the brain network research, to help the research on the connectivity patterns of both normal and diseased brains. Besides, one important outcome is an accelerated BLAS and Graph algorithms package, which will provide insights into domain specific computing to boarder audience in both biomedical and computer science domains.