Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment

G. Gaudin; G. Riou; Didier Landru; Catherine Tempesta; Ionut Radu; Mariam Sadaka; Kevin Winstel; Emily Kinser; R. Hannon

doi:10.1109/3dic.2010.5751472

ScienceGate Book Chapters

JOURNAL ARTICLE

Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment

G. Gaudin G. Riou Didier Landru Catherine Tempesta Ionut Radu Mariam Sadaka Kevin Winstel Emily Kinser R. Hannon

Year: 2010 Vol: 1 Pages: 1-4

DOI: 10.1109/3dic.2010.5751472

Get Full-Text PDF Get Analytical Report

Abstract

In this paper the integration challenges related to oxide-oxide bonding for wafer-to-wafer stacking technology are discussed. Furthermore, interface defectivity, wafer-to-wafer alignment and bond strength data are presented.

Keywords:

Wafer Wafer bonding Die preparation Materials science Direct bonding Wafer-scale integration Wafer backgrinding Anodic bonding Optoelectronics Wafer testing Wafer dicing

Metrics

Cited By

1.29

FWCI (Field Weighted Citation Impact)

Refs

0.83

Citation Normalized Percentile

Is in top 1%

Is in top 10%

Citation History

Topics

3D IC and TSV technologies

Physical Sciences → Engineering → Electrical and Electronic Engineering

Electronic Packaging and Soldering Technologies

Physical Sciences → Engineering → Electrical and Electronic Engineering

Additive Manufacturing and 3D Printing Technologies

Physical Sciences → Engineering → Automotive Engineering

Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment

Abstract

Metrics

Citation History

Topics

Related Documents

Chemical Free Room Temperature Wafer To Wafer Direct Bonding

Wafer Substrate Impact on Direct Wafer-to-Wafer Bonding Process

Low temperature wafer direct bonding

Direct wafer bonding technology of 300mm wafer

Heterogeneous integration through direct wafer bonding