Fabrication processes have been developed for the construction of an n-channel insulated-gate gallium arsenide field effect transistor (MISFET). GaAs-insulator interface properties were investigated from an analysis of MIS characteristics Energy distributions of interface state density were U shape having minimum values near the midgap energy. The minimum values were dependent upon conduction type of substrates amd deposition conditions of insulator films and ranged 1 - 20 \times 10^{11} cm -2 eV -1 for p-type substrates and 1 - 4 \times 10^{12} cm -2 eV -1 for n-type substrates. The n + -regions for source and drain were made by diffusion of tin from the tin-doped silica film or by implantation of silicon ions. The planar passivated diode showed leakage current of less than 1 µA at 5 V reverse bias. An n-channel MISFET was fabricated using above techniques. The maximum field effect mobility of 1480 cm 2 V -1 sec -1 was obtained.
Hock-Chun ChinMing ZhuXinke LiuHock-Koon LeeLuping ShiLeng-Seow TanYee‐Chia Yeo
Yukinobu ShinodaMasamichi OkamuraEiichi YamaguchiTakeshi Kobayashi