Dispatching rule considering time-constraints on processes for semiconductor wafer fabrication facility

Abstract

There are many constraints in a semiconductor wafer fabrication facility (fab), especially time-constraints on processes. This paper gives a dispatching rule considering time-constraints (DRTC) that makes use of such information as due date of a job, workload of a machine, occupation time of a job on a machine, and time constraint of a process. The relative importance of each category is determined by weighting parameters, which are set by learning simulation samples with a backward propagation neural network (BPNN). A real fab simulation model is used to demonstrate the proposed method. The simulation results indicate that DRTC is superior to common rules (such as FIFO, EDD, CR and SRPT ) and the existing dispatching rule used in the fab (called as PRIOR) with more movements of WIP and higher time-constraints satisfaction proportion.