A 65-nm CMOS Prototype Chip With Monolithic Pixel Sensors and Fast Front-End Electronics

Abstract

This work is concerned with the design criteria and the experimental characterization of front-end electronics in a 65-nm CMOS technology for the readout of hybrid pixels and of monolithic active pixel sensors using a deep N-well as their collecting electrode. The work presents a summary of the experimental results relevant to a prototype chip, named Apsel65, focusing particularly on the front-end processor features and performance.